A. International Referred Journals

A1.        G.S. Athanasiou, H.E. Michail, G. Theodoridis and C. E. Goutis, “High-Performance FPGA Implementations Of The Cryptographic Hash Function JΗ”, IET Computers & Digital Techniques, vol. 7, Iss.1 , pp. 29–40, 2013.

A2.        G. S. Athanasiou, H.E. Michail, G. Theodoridis, T.Kasparis and C.E Goutis, “A Systematic Flow For Developing Totally Self-Checking Architectures For SHA-1 And SHA-2 Cryptographic Hash Families”, Journal of Circuits, Systems and Computers (JCSC), World Scientific Publishers Company, vol. 22, no. 6, pp. xxx–xxx, July 2013.

A3.        G.S. Athanasiou, H.E. Michail, G. Theodoridis and C. E. Goutis, “Optimizing the SHA-512 Cryptographic Hash Function On FPGAS”, IET Computers & Digital Techniques, vol. x, Iss.x , pp. xx–xx, 2013.

A4.      H.E. Michail, G. S. Athanasiou, V. Kelefouras, G. Theodoridis and C. E. Goutis, “On the exploitation of a high-throughput SHA-256 FPGA design for HMAC”, ACM Transactions on Reconfigurable Technology and Systems (TRETS) , vol. 5, Iss. 1, March 2012.

A5.        N. Alachiotis, V. Kelefouras, G. Athanasiou, H. E. Michail, A.  Kritikakou, and C. E. Goutis,, “A Data Locality Methodology for Matrix-Matrix Multiplication Algorithm”, Journal of Supercomputing, Springer Science, vol. 59, No.2, pp. 830–851, 2012.

A6.        H.E. Michail, A.P. Kakarountas,, G. Selimis, D. Schinianakis and C.E Goutis, “Cipher Block Based Authentication Module: A Hardware Design Perspective”, Journal of Circuits, Systems and Computers (JCSC), World Scientific Publishers Company, vol. 20, no. 2 pp. 163–184, 2011.

A7.       V. Kelefouras, G. Athanasiou, N. Alachiotis, H. E. Michail, A.  Kritikakou, and C. E. Goutis,, “A Memory Efficient Fast Fourier Transform (FFT) Methodology”, IEEE Transactions on Signal Processing, vol.59, no 12, pp. 6217–6226, 2011.

A8.        H.E. Michail, “Cryptography in the Dawn of IPv6”, IEEE Goldrush Newsletter, vol. Dec 2010, pp. 17,  December 2010.

A9.       A. Milidonis, N. Alachiotis, V. Porpodas, H.E. Michail, G. Panagiotakopoulos, A. P. Kakarountas, and C. E. Goutis, “Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy”, Journal of Signal Processing Systems  , vol.59, Iss. 3, pp. 281–296, 2010.

A10.   H. E. Michail, G. S. Athanasiou, A. A. Gregoriades, Ch. L. Panagiotou, C.E. Goutis, “High Throughput Hardware/Software Co-design Approach for SHA-256 Hashing Cryptographic Module in IPSec/IPv6”, Global Journal of Computer Science and Technology , vol.10, iss. 4, pp.54–59, 2010.

A11.   D.M. Schinianakis, A.P. Fournaris, H.E.Michail, A.P. Kakarountas and T. Stouraitis, “An RNS Architecture of an Fp Elliptic Curve Point Multiplier”, IEEE Transactions on Circuits and Systems I , vol.56, no 6, pp. 1202–1213, 2009.

A12.   A.P. Kakarountas, H.E. Michail, C.E. Goutis and A.M. Rjoub, “High-Throughput Implementation of RipeMD-160”, International Journal for Internet Technology and Secured Transactions, Inderscience Ltd, vol.1, no 3/4, pp. 309–316, 2009.

A13.   A. Gregoriades, H. Michail, M. Pampaka, “Assessing Students’ Learning using Concept Mapping”, Journal of Information Systems Education, Education Special Interest Group (EDSIG) of the Association of Information Technology Professionals (AITP), vol.40, no 2, pp. 419–430, 2009.

A14.   H.E.Michail, A. P. Kakarountas, A. S. Milidonis and C. E. Goutis, “A Top-Down Design Methodology for Implementing Ultra High-Speed Hashing Cores”, IEEE Transactions on Dependable and Secure Computing , vol. 6, no.4 , pp. 255–268, 2009.

A15.   A. Milidonis, V. Porpodas, N. Alachiotis,  A. Kakarountas, H.Michail, G. Panagiotakopoulos  and C. E. Goutis, “Low Power Architecture with Scratch-Pad Memory for Accelerating Embedded Applications with Run Time Reuse”, IET Computers & Digital Techniques, vol.3, Is. 1, pp. 109–123, 2009.

A16.   G. Selimis, A. Fournaris, H. Michail,  and O. Koufopavlou, “Improved Throughput Bit-Serial Multiplier for GF (2^m) fields”, Integration, the VLSI Journal, vol.42, Is. 2, pp. 217–226, 2009.

A17.   H. E. Michail, V. Thanasoulis,  Panagiotakopoulos, A. Kakarountas, and C. E. Goutis, “Efficient Pipelined Hardware Implementation of RIPEMD-160 Hash Function”, International Journal of Electronics, Circuits and Systems, Volume 2 Number 2, 2008.

A18.   H.E.Michail, G.Selimis, M. Galanis, D. Schinianakis and C.E. Goutis, “Novel Hardware Implementation of the Cipher Message Authentication Code (CMAC)”, Journal of Computer Systems, Networks, and Communications of Circuits, Hindawi Publishing Corporation, Volume 2008 (2008), Article ID 923079, 6 pages doi:10.1155/2008/923079,(available online), 2008.

A19.   H.E. Michail, G.A. Panagiotakopoulos, V.N. Thanasoulis, A.P. Kakarountas, C.E. Goutis “Server Side Hashing Core Exceeding 3 Gbps of Throughput”, International Journal of Network Security (special issue), Vol. 1, Nos. 1/2/3, pp. 43–53, 2007.

A20.   A.P.Kakarountas, N.D.Zervas, H.E.Michail, G.Theodoridis, and D.Soudris, “Power Management through Dynamic Frequency Scaling for Low and Medium bit-rate Digital Receivers”, Journal of Low Power Electronics, ASP, vol.2, no 3, pp. 356–364, 2006.

A21.   I. Yiakoumis, M. Papadonikolakis, H.E. Michail, A.P. Kakarountas, C.E. Goutis “Maximizing the hash function of authentication codes”, IEEE Potentials, vol. 25, iss. 2, pp. 9–12, 2006.

A22.   H.E. Michail, A.P. Kakarountas, A.Milidonis, C.E. Goutis, “Efficient FPGA Implementation of Novel Cryptographic Hashing Core”, Computing Letters, VSP/Brill Publishing, vol. 2, num. 1-2, pp. 21-27(7), 2006.

A23.    A.P. Kakarountas, H. Michail, A. Milidonis, G. Theodoridis, C.E Goutis, “High-Speed FPGA Implementation of Secure Hash Algorithm for IPSec and VPN Applications”, Journal of Supercomputing, Springer Science, vol. 37, pp. 179–195, 2006.

A24.    H. Michail, A.P. Kakarountas and C.E Goutis, “Case study and Application of Pre-Computation Technique for Hashing Cores Aiming at High-Throughput Implementations”, WSEAS Transactions on Computers, issue 7 vol. 4, pp. 787- 796, ISSN 1109-2750, July 2005.

B. International Referred Conferences, Symposiums and Workshops

B1.       H. E. Michail, G. S. Athanasiou, A. Gregoriades, G. Theodoridis and C. Goutis, “On the development of totally self-checking hardware Design for the sha-1 hash function”, in Proc. of the 2012 International Conference on Security and Cryptography (SECRYPT'12), Rome, Italy, pp. 309-313, Jul. 2012.

B2.       A. Gregoriades, K. Mouskos and  H. E. Michail, “Combining Traffic Simulation with Bayesian Networks for improved Quantification of Accident Risk Index”, in Proc. of the 44^th Summer Computer Simulation Conference (SCSC 2012), Genoa, Italy, pp. xxx-xxx, Jul. 2012.

B3.       G. S. Athanasiou, C. I. Chalkou, D. Bardis, H. E. Michail, G. Theodoridis and C. Goutis, “High Throughput Hardware Architectures of the JH Round Three SHA-3 Candidate: An FPGA Design and Implementation Approach”, in Proc. of the 2012 International Conference on Security and Cryptography (SECRYPT'12), Rome, Italy, pp. 309-313, Jul. 2012.

B4.       A. Gregoriades, K. Mouskos and  H. E. Michail,  “An Intelligent Transportation System for Accident Risk Index Quantification”, in Proc. of the 14th International Conference on Enterprise Information Systems (ICEIS), Wrocklaw, Poland, pp. xxx-xxx, Jun. 2012.

B5.       G. S. Athanasiou, E. N. Tsingkas, C. I. Chalkou,  H. E. Michail, G. Theodoridis and C. Goutis, Design and Implementation of a SHA-3 Candidate Skein-512 Hash/MAC Hardware Architecture”, in Proc. of the 2012 IEEE International Conference on Industrial Technology (ICIT)), Athens, Greece, pp. xxx-xxx, Mar. 2012

B6.     H. Michail, A. Gregoriades, V. Kelefouras, A. Kotsiolis, D. Papagianopoulou and C. Goutis “HW/SW co-Design Integrating High - Speed Authentication Module for IPSec/IPv6”, in Proc. of the 2010 International Conference on Digital Telecommunications (ICDT'10), Athens, Greece, pp. 138-142, Jun. 2010.

B7.     H. Michail, A. Gregoriades, V. Papadopoulou, G. Athanasiou, A. Kritikakou and C. Goutis, “High Throughput Hardware/Software Codesign Methodology For Designing Sha-256 Hashing Cryptographic Module In Hardware”, in Proc. of the 2010 International Conference on Security and Cryptography (SECRYPT'10), Athens, Greece, pp. 309-313, Jul. 2010.

B8.      A.Gregoriades S. Obadan, , H. Michail, V.Papadopoulou,  D. Michael “A Robotic System for Home Security Enhancement”, in Proc. of the 2010 International Conference on Smart Homes and Health Telematics  (ICOST'10), Seoul, Korea, pp. 43-52, Jun. 2010.

B9.     H. Michail, G. Athanasiou, G. Makridakis and C. Goutis, “Designs and Comparisons of Authentication Modules for IPSec in Configurable and Extensible Embedded Processor”, in Proc. of the 17th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2010), Athens, Greece, pp. 243-246, Dec. 2010.

B10.         H. Michail,V. Thanasoulis, D. Schinianakis, G. Panagiotakopoulos and C. Goutis “Application Of Novel Techniques In RIPEMD-160 Hash Function Aiming At High-Throughput”, in Proc. of the 2008 IEEE International Symposium on Industrial Electronics (ISIE'08), Cambridge, United Kingdom, pp. 1937-1940, July 2008.

B11.        A. Kakarountas, G. Theodoridis, H. Michail, and C.E. Goutis “A Segmented High-Speed Counter Based on the Use of Redundant Bits”, in Proc. of the 16^th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC'08), Rhodes, Greece, pp. 42-48, Oct. 2008.

B12.        A. Milidonis, V.Porpodas, N. Alachiotis, A.Kakaroudas, H. Michail, G. Panagiotakopoulos and C. Goutis “A Scratch-Pad Memory Accelerator for Exploiting Run-Time Reuse”, in Proc. of the 16^th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC'08), Rhodes, Greece, pp. xx-xx, Oct. 2008.

B13.        H. Michail, and C.E. Goutis “Holistic Methodology for Designing Ultra High-Speed SHA-1 Hashing Cryptographic Module in Hardware”, in Proc. of the 2008 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC'08), Hong Kong, China, pp. 1-4, Dec. 2008.

B14.     A. Milidonis, N. Alachiotis, V. Porpodas, H. Michail, A. P. Kakarountas, and C. E. Goutis, “A Decoupled Architecture of Processors with Scratch-Pad Memory Hierarchy”, in Proc. of Design, Automation & Test in Europe (DATE’07), Nice, France, pp. 612-617, April 2007.

B15.    A.P. Kakarountas, H.E. Michail, and C.E. Goutis, “RipeMD-160 Implementation Optimized in Terms of Throughput”, to appear in Proc. of 3rd International Conference on Information Technology (ICIT’07), Amman, Jordan, pp. - , May 2007.

B16.    H.E. Michail, A.P. Kakarountas, G. Selimis and C.E. Goutis, “Throughput Optimization of the Cipher Message Authentication Code”, in Proc. of the 2007 IEEE Intl. Conf. on Digital Signal Processing (DSP’07), Cardiff, Wales, UK, pp. 495-498, July 2007.

B17.    A.P. Kakarountas, H. Michail, C.E. Goutis, and C. Efstathiou, “Implementation of HSSec: a High-Speed Cryptographic Co-processor”, in Proc. of the 2007 IEEE Conference on Emerging Technologies and Factory Automation, (ETFA 2007), Patras, Greece, pp. -, Sept. 2007.

B18.     A. Kakarountas, H. Michail, and C.E. Goutis “Integration of a Concurrent Signature Monitoring Mechanism in a System-on-a-Chip”, in Proc. of the 2007 IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS'07), Rabat, Morocco, pp. 47-51, Sept. 2007.

B19.    F. Aisopos, K. Aisopos, D.M. Schinianakis, H.E. Michail, A.P. Kakarountas, “A Novel High-Throughput Implementation of a Partially Unrolled SHA-512” in Proc. of IEEE Mediterranean Electrotechnical Conference, MELECON 2006, Malaga, Spain, pp. 61-65, May 16-19, 2006.

B20.     H.E. Michail, A.P. Kakarountas, A.S. Milidonis, G.A. Panagiotakopoulos, V.N. Thanasoulis, C. E.Goutis, “Temporal and System Level Modifications for High Speed VLSI Implementations of Cryptographic Core” in Proc. of the IEEE 2006 International Conference on Electronics, Circuits and Systems (ICECS’06), Nice, France, pp. 1180-1183, Dec. 2006.

B21.    H.Michail, A.P. Kakarountas, O. Koufopavlou, C.E. Goutis, “A Low-Power and High-Throughput Implementation of the SHA-1 Hash Function”, in Proc. of IEEE 2005 International Symposium on Circuits and Systems (ISCAS’05), Kobe, Japan, pp. 4086-4089, May 2005.

B22.     A.P. Kakarountas, H. Michail, C.E. Goutis, "Design of High-Speed Cryptographic Algorithms for Data Authenticity and Integrity", in the Proc. of the 1st Hellenic Conference of Electricel Engineers, Athens, Mar. 2005.

B23.     H. Michail, A.P. Kakarountas, A. Milidonis, C.E. Goutis, “Low Power and High Throughput Implementation of SHA-256 Hash Function”, in Proc. of International E-Conference on Computer Science (IeCCS 2005), pp. 170-173, May 2005.

B24.    H.E. Michail, A.P. Kakarountas, G.N. Selimis, C.E. Goutis, “State-of-the-Art Implementation of SHA-1 Hash Function for Low-Power and High Throughput”, in Proc. of IEEE 2005 International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS’05), Leuven, Belgium, pp. 591-600, Sep. 2005.

B25.    K. Aisopos, A.P. Kakarountas, H. Michail, C.E. Goutis, “High throughput implementation of the new Secure Hash Algorithm through partial unrolling”, in Proc. of IEEE 2005 International Workshop on Signal Processing Systems (SiPS’05), Athens, Greece, pp. 99-103, Nov. 2-4, 2005.

B26.    H. Michail, A. Milidonis, A.P. Kakarountas, C.E. Goutis, “Novel High Throughput Implementation of SHA-256 Hash Function Through Pre-Computation Technique”, to appear in Proc. of the IEEE 2005 International Conference on Electronics, Circuits and Systems (ICECS’05), Gammarth, Tunisia, pp. -, Gammarth, Tunisia 11-14 Dec. 2005.

B27.    G.Selimis, N.Lazarou, H.E. Michail, O.Koufopavlou, “VLSI Design and Implementation of Reconfigurable Cryptographic Systems for Symmetric Encryption”, in Proc. of the IEEE 2005 International Conference on Electronics, Circuits and Systems (ICECS'05), pp. --, Gammarth, Tunisia 11-14 Dec. 2005.

B28.    I. Yiakoumis, M. Papadonikolakis, H. Michail, A.P. Kakarountas, C.E. Goutis, “Efficient small-sized implementation of the keyed-hash message authentication code”, in Proc. of IEEE 2005 EUROCON as finalist in the IEEE Region 8 Best Student Paper Contest, Belgrade, Yugoslavia, pp. 1875-1878, Nov. 21-24, 2005.

B29.   H.E. Michail,  A.P. Kakarountas, C.E. Goutis, “Efficient Implementation of the Keyed-Hash Message Authentication Code (HMAC) Using the SHA-1 Hash Function”, in Proc. of the IEEE 2004 International Conference on Electronics, Circuits and Systems (ICECS’04), Tel-Aviv, Israel, pp. 567-570, Dec. 2004.

C. Book Chapters

C.1.       H. Michail, A. Gregoriades, V. Kelefouras, G. Athanasiou, A. Kritikakou and C. Goutis, “Authentication with RIPEMD-160 and other alternatives: A Hardware Design Perspective”, in “Advanced Technologies”, IN-TECH Inc. Publishers, Vienna, Austria, pp. 103-124 ISBN: 978-953-307-067-4, March 2010.

C.2.       A.P. Kakarountas, H.E. Michail, “Performance for Cryptography: a hardware approach”, in “Cryptography Research Perspectives”, Ed. Roland E. Chen, Nova Science Publishers Inc., pp. 217-232, ISBN: 978-1-60876-823-3, 2009.

C.3.       A.P. Kakarountas, H.E. Michail, “Performance for Cryptography: hardware and software approach”, in “Supercomputing Research Advances”, Ed. Frank Columbus, Nova Science Publishers, Inc., pp. 403-418, ISBN: 978-1-60456-186-9, 2008.

1.    “EASY: Energy-Aware SYstem-on-Chip design of the HIPERLAN/2 standard” IST-2000-30093 με χρηματοδότηση από την Ευρωπαϊκή Ένωση (1/9/2001-31/8/2004).

2.    “Μεθοδολογίες εύρεσης αρχιτεκτονικών ετερογενών συστημάτων σε ολοκληρωμένο κύκλωμα με επαναπροσδιοριζόμενες αρχιτεκτονικές πίνακα, για εφαρμογές κυριαρχούμενες από δεδομένα” στα πλαίσια του ΠΕΝΕΔ’03 – 03ΕΔ507 με χρηματοδότηση από ΓΓΕΤ.

3.    “MARLOW: A central market place for dissemination of low power microelectronics”, IST-2001-37115, με χρηματοδότηση από την Ευρωπαϊκή Ένωση.

4.     “Μεθοδολογίες εύρεσης αρχιτεκτονικών επαναδιατασώμενων  ενσωματωμένων συστημάτων” στα πλαίσια του ερευνητικού προγράμματος ΠΥΘΑΓΟΡΑΣ Ι με χρηματοδότηση από το Υπουργείο Παιδείας.

5.    “Σχεδίαση Ολοκληρωμένου Κυκλώματος” με χρηματοδότηση από Υπουργείο Εργασίας/ Σύνδεση ΑΕΙ/ΤΕΙ Επιχειρήσεις.

6.    “COSAFE: Low power hardware-software codesign for safety critical applications” (Esprit project 28593), Subproject of Esprit 26225 ESD-LPM/MSD, με χρηματοδότηση από την Ευρωπαϊκή Ένωση.

7.    “Στοιχεία μικροηλεκτρονικής για Lab-On-Chip όργανα μοριακών αναλύσεων για γενετικές και περιβαλλοντικές εφαρμογές”, με χρηματοδότηση από την Ελληνική Πρωτοβουλία Τεχνολογικών Συνεργατικών Σχηματισμών (Corallia).

8.    “JET (Joint European Training) –D/96/2/1650/PI/II.1.1.C/CONT/Leonardo Da Vinci”, με χρηματοδότηση από την Ευρωπαϊκή Ένωση.

·      Υποτροφίες:

Υποτροφία διδακτορικής έρευνας μέσω του προγράμματος «ΠΕΝΕΔ 2003» της ΓΓΕΤ για χρονικό διάστημα 36 μηνών στα πλαίσια του έργου: « Μεθοδολογίες εύρεσης αρχιτεκτονικών ετερογενών συστημάτων σε ολοκληρωμένο κύκλωμα με επαναπροσδιοριζόμενες αρχιτεκτονικές πίνακα, για εφαρμογές κυριαρχούμενες από δεδομένα.» αρχομένης τον Δεκέμβριο 2005.

·         The Matsumae International Foundation, Japan «Research Fellowship Program», τίτλος έργου “High Performance Hash Cores for IPv6”, σε συνεργασία με το  University of Tsukuba, Japan.