Course Purpose and Objectives
The objectives of this course are:
• Study and understanding of the basic functional principles of Digital Systems and Circuits, their parameters, their design constraints and the technologies for their implementation and design.
• The thorough study and detailed understanding of the main issues and concepts for designing combinational and sequential logic circuits as well as their optimal design and the various implementation parameters.
• Understanding of the programmable logic devices with an emphasis on FPGAs and introduction to describing digital circuits and systems using HDLs
• Analysis and design of counters (synchronous and asynchronous) and registers.
•Analytical study and understanding of State Diagrams design and implementation of the respective FSM State Machines.
• Analytical study and detailed understanding of the operations of basic types of RAM (SRAM, DRAM) and ROM.
Learning Outcomes
At the end of this course the students will have understood the basic principles, parameters and limitations of digital systems design and implementation of the corresponding circuits as well as how to evaluate and compare various designs and implementations.
Students will also have acquired the necessary knowledge to design and optimize digital systems, having studied extensively the design of combinational and sequential circuits, as well as FSM State Machines.
In addition, they will have understood the basic principles of various programmable logic devices, especially FPGAs, and will have acquired some basic knowledge of circuit design with HDL languages.
In addition, they will be able to design counters and registers according to the needs of their applications.
Finally, they will know the functions and operations of the basic types of semiconductor memories (RAMs, ROMs) and their specific characteristics.
Course Content
Integration Technology and Advantages, Integrated Circuits (ICs) Logic Families, Critical Path, Integration Area and Power Dissipation, Noise and Noise Margins, Fan-out, Logic Gates Implementation in TTL, CMOS, CMOS Logic Function Design and Power Consumption, CMOS Transistor Sizing, Transmission Gates, CMOS Physical Layout.
Combinational Logic: Design of Combinational circuits, Design with CAD tools and Hardware Description Languages(HDL), Basic Combinational logic functions and circuits: Adders (Ripple Carry Adder, Carry Look-Ahead Adder, Carry Select Adder), Subtractor, Add/Sub circuit, Multiplexers, Demultiplexers, Comparators, Priority Encoders, Decoders and other digital circuits, Combinational Logic ICs Hierarchical Design and Cascade Extension, Applications of Combinational Circuits.
Programmable Logic Devices: ROMs, PLAs, PALs, CPLDs, FPGAs and Digital Design Implementation, Design Simulation and Debugging, Performance Estimation and Implementation Area
Sequential Logic Circuits: Latches, Master-Slave, D, J-K and T Flip Flops, Set and Reset Signals (Synchronous and Asynchronous), Operating conditions and Timing of Flip Flops, Special Design Issues for Flip Flops, Flip Flop ICs and Applications.
Synchronous and Asynchronous Counters: Binary, Decimal, Modulo-n, Methodology for Synchronous Counter Design: General Case, Counters ICs and Counting Extension (Cascade), Sequential Design with Hardware Descriptive Language (HDL).
Registers: Parallel Load, Shift Register, Serial or Parallel Input / Serial or Parallel Output, Multi-Function Shift Register, Registers-Counters (Johnson Counter)
Finite State Machines: State Diagram, Mealy and Moore State Machine Circuits, Design Methodology and Examples.
Semiconductor Memories: Typical Memory Internal Memory, Memory Features, Memory Storage Cells-Organization-Adressing-Read and Write Operations in SRAMs and DRAMs, Read-only memory, EEPROM, Flash.